1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, more particularly, to a method of manufacturing an interlayer insulating film for isolating a gate of the semiconductor device from the other gate and upper metal.
2. Discussion of Related Art
Generally, in a semiconductor device, gate electrode pattern is formed, and then an interlayer insulating film is formed over the entire structure in order to isolate one gate from the other gates and upper metal wiring. The interlayer insulating film is patterned to form contact holes for opening contact portions, and then, contact plugs are formed by burying the contact holes with metal. In order to uniformly form such contact plugs in an exact size on a wafer, the shape of upper parts of regions in which the contact plugs are to be formed should be smooth. However, in case where an interlayer insulating film is formed by using a conventional method, slopes occur in the shape of the upper parts of the regions in which the contact plugs are to be formed.
FIG. 1 is a SEM picture for explaining conventional problems.
Referring to FIG. 1, particularly, in a NAND-type flash device, a distance between regions, in which contact plugs are to be formed between select transistors positioned at both ends of a cell string, is wider than a cell string interval. Because of such pattern difference, when an HDP oxide film is formed by using a general deposition method, there is occurred a problem that upper parts of regions in which the contact plugs are to be formed are recessed. Thus, there is a problem that it is difficult to form an exact contact plug pattern during a patterning process using a photoresist film. Namely, there is a problem that it is difficult to assure uniformity of a threshold dimension and exact target control over the entire wafer because of poor margin assurance in a photo-engraving process.